It appears that AMD will be sticking with an 8-core dies as far as the fabrication of Zen processors in the Summit Ridge platform is concerned. The mainstream desktop platform is expected to feature 8-core and 6-core variants with SMT and will not, initially, have any quad core or dual core options. On the other hand, the company is expected to launch Bristol Ridge with Quad Core and Dual Core flavors right off the bat.
AMD x86 Zen mainstream processors will come in octa core and hexa core flavors
A report by the Italian publication Bitsandchips.it reveals that AMD will initially only be using octa core dies in the fabrication process of Zen based processors. This method will be the optimal route to use in the production of its Summit Ridge processors because not only will it allow for cost savings (just one die) but will result in the initial wave of Zen x86 CPUs being exceptionally powerful. Since the company is going to be pitting the brand new architecture against Intel’s offerings, which has so far been ahead of the game, Octa-Core and Hexa-Core Zen processors with SMT should be able to compete effectively with their blue counterparts.
Keeping in mind how yield works, we are probably going to be looking at 8-Core and 6-Core flavors in Zen Summit Ridge platform. If the company runs into exceptionally bad yields, we might see some rare OEM spottings of 4-Core flavors as well – but that is unlikely. Once the dust settles after the initial wave, the company could decide to use different dies in the fabrication process of its future series – but for now, they appear to be sticking with an Octa-Core one. The company will be using the new AM4 socket which will allow it to unify its offerings across all platforms as well as house the new generation of Wraith Coolers. All in all, things are looking pretty good on the CPU side of things for AMD.
The slide shows the Summit Ridge and Bristol Ridge Platform being the next step in AMD’s evolution. The Summit Ridge platform houses the mainstream desktop processors from AMD that will utilize the x86 Zen micro-architecture. The process will be 14nm FinFET (according to footnotes in AMD’s older slides) and will be based on the Promontory Chipset. The TDP is stated to be around 95W – although this remains to be seen. The processor will scale upto 8 cores and will be fully compatible with DDR4 memory. The socket, is ofcourse the AM4.
Samsung/GlobalFoundries 14nm FinFET Technology
Our 14nm FinFET ramp is exceeding plan with best-in-class yield and defect density. The early-access version of the technology (14LPE) was qualified in January and is well on its way to volume production, meeting yield targets on lead customer products. The performance-enhanced version of the technology (14LPP) is set for qualification in the second half of 2015, with the volume ramp beginning in early 2016. Prototyping on test vehicles has demonstrated excellent logic and SRAM yields and performance at near 100% of target.
A little recap for our readers who are still confused about the entire Samsung/GlobalFoundries affair: Samsung, GlobalFoundries and IBM have maintained for many year what they called the “Common Platform” which involved sharing R&D. This time around, Samsung has went one step further, and exclusively with GloFo I might add (IBM was not mentioned), with an approach called Copy-Smartly. If you think this sounds familiar – you would be right. Copy-Smartly follows the same ideology behind Intel’s Copy Exactly (but not to the same level of duplication) and involves GloFo synchronizing its recipe, tool and process at its own foundries. In simple words, a 14nm LPP ramp at Samsung can be taken as a successful 14nm LPP ramp at GlobalFoundries.
Zen promises to deliver 40% IPC gains and will shift from CMT approach to SMT among other things. That’s not it either, Zen will be using a scheduling model that is similar to Intel’s and it will use specific hardware and simulation to define any needed scheduling or NUMA changes. It will also be ISA compatible with Haswell/Broadwell style of compute. It will bring various compiler optimisations, including GCC with target of SPECint v6 based score at common compiler settings. Benchmarking and performance compiler LLVM targets SPECint v6 rate score at performance compiler settings. Each Zen core will have access to 512KB of L2 cache and 4 Zen cores will share 8MB of L3 cache. The time frame given by AMD regarding the arrival of the brand new micro-architecture is Q4 2016.
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